Interfacing Micron DDR2 Memory Modules to Xilinx Virtex5 FPGAs

Application Notes > Interfacing Micron DDR2 Memory Modules to Xilinx Virtex5 FPGAs

Application Notes

Interfacing Micron DDR2 Memory Modules to Xilinx Virtex5 FPGAs: A Step-By-Step Guide

Step-By-Step Application Note (PDF)

Interfacing an off-chip DDR2 memory module to a Xilinx Virtex-5 FPGA involves a variety of design considerations. This application note provides a step-by-step guide for a design engineer who needs to quickly and efficiently create an FPGA design using the Xilinx Virtex-5 FPGA and a Micron DDR2 memory module. This application note covers:

Device Selection
FPGA Design
Board Level Considerations
Appendix 1: A Step by Step Guide for using MIG

Part Number
Xilinx Virtex 5: XC5VLX110
Micron: HTF4C16
Xilinx ML505 Development Kit: HW-V5-ML505-UNI-G

Data Sheets (PDF)

•	Micron Technology MT4HTF3264HY Data Sheet (HTF4C16_32_64x64H.fm - Rev. G 2/08 EN )
•	Xilinx Virtex 5 Family Overview (DS100)
•	Xilinx Memory Interface Generator (MIG) (UG086, V2.0)

Relevant Web Links

Micron
•	Micron Design Support
Xilinx
•	Xilinx ML505 Evaluation Platform User Guide (UG347, V2.0)
•	Xilinx Memory Interface Generator (MIG) (UG086, V2.0)
•	Xilinx Virtex-5 User Guide (UG190)
•	Xilinx Virtex-5 PCB Designer’s Guide (UG203)
•	WASSO Calculator for Virtex-5 devices (Rev )
•	High-Performance DDR2 SDRAM Interface In Virtex-5 Devices (XAPP858, Rev )
•	ML561 Memory Interface Development Board User Guide (UG199, 8/9/07 Rev 1.1)
•	Xilinx Memory Solutions
Nu Horizons
•	Nu Horizons Micron Page
•	Nu Horizons Xilinx Page

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