Interfacing Micron DDR2 Memories to Xilinx Spartan-3A FPGA

Application Notes > Interfacing Micron DDR2 Memories to Xilinx Spartan-3A/AN FPGA

Application Notes

Interfacing Micron DDR2 Memories to Xilinx Spartan-3A/AN FPGA

Step-By-Step Application Note (PDF)

This application note designed to walk engineers through all the design tasks required when designing with Micron DDR2 memory and Xilinx Spartan 3A/AN FPGA. The guide is divided into the following sections:

Device Selection
FPGA Design
Board Design Considerations
Conclusions
Appendix A: A Step-By-Step Guild to Using MIG

Part Number
MT47H32M16BN
XC3S50A
XC3S200AN
HW-SPAR3ADDR2-DK-UNI-G

Data Sheets (PDF)

•	Micron Technology MT47H32M16 Data Sheet (Rev K 8/06)
•	Xilinx Spartan3-A Data Sheet (DS529, 7/10/2007)
•	Spartan-3AN FPGA Family Data Sheet (DS557, 12/12/07)
•	Xilinx OPB DDR2 Memory Controller IP Core Data Sheet (DS532, V1.2)
•	Xilinx Memory Interface Generator (MIG) (UG086, V2.0)

Relevant Web Links

Micron
•	Micron Design Support

Xilinx
•	Xilinx WASSO Calculator and application note (xapp689, Rev 1.2)
•	Xilinx DDR2 Memory Interface for Spartan-3 FPGAs (xapp454, V1.1.1)
•	Xilinx Spartan-3A/AN Starter Board Rev D User Guide (ug334, v1.0- May 28, 2007)
•	Xilinx Memory Solutions

Nu Horizons
•	Nu Horizons Micron Page
•	Nu Horizons Xilinx Page

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