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| MachXO2 Family |
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| Low Cost, Low Power PLD |
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The MachXO2 family of programmable logic devices is optimized for low density
applications, with an unprecedented mix of low cost, low power and high system
integration. Now, with 10 new reference and demo designs, you can complete your
design faster than ever.
Microprocessors often have a limited number of general purpose I/O (GPIO)
ports that reduce pin count and shrink package size, but limit the number of I/Os to
which a microprocessor can be connected. To allow more I/Os to be connected to
microprocessors, I/O expanders or port expanders are used to provide I/O expansion
capability. Most generic GPIO expanders use low pin count protocols, such as I²C or
SPI, as the interface to the master. They allow designers to save the GPIO ports on the
microprocessor for other critical tasks.
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I²C Slave Peripheral Using Embedded Function Block
(Lattice Reference Design RD1124):
- Provides a programmable solution for serial expansion of GPIOs
- Uses an Inter IC Communication (I²C) interface between the
microprocessor and the GPIOs
- Provides additional control and monitoring capabilities for a
microprocessor when it does not have sufficient GPIOs to do the job
- Provides an I²C memory interface to the microprocessor
SPI Slave Peripheral Using Embedded Function Block
(Lattice Reference Design RD1125):
- Provides a programmable solution for serial expansion of GPIOs
- Uses a Serial Peripheral Interface (SPI) bus between the microprocessor
and the GPIOs
- Provides additional control and monitoring capabilities for the
microprocessor when it does not have sufficient GPIOs to do the job.
- Provides a SPI memory interface to the microprocessor
RAM-Type Interface for Embedded User Flash Memory
(Lattice Reference Design RD1126):
- Utilizes the User Flash Memory (UFM) block
(available on MachXO2™-640/U and higher density devices)
- UFM block connects to the device core through the Embedded Function
Block (EFB) WISHBONE interface. If desired, users can also access the
UFM block independently through the hardened JTAG, I²C and SPI
interfaces of the device.
- Facilitates user access to the MachXO2 EFB UFM module without the
knowledge of WISHBONE protocol.
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| Learn How to Design |
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The seminar will include hands-on technical training and
live hardware demonstrations on a variety of new MachXO2
enhancements, including:
- Use of hardened I²C and SPI Ports and User Flash Memory
(UFM)
- Configuration of Mach XO2 through Sysconfig ports &
WISHBONE Interface
- Demonstration of Mach XO2 power saving features
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| Lattice: | | LCMXO2-256 |  | | LCMXO2-640 |  | | LCMXO2-1200 |  | | LCMXO2-2000 |  | | LCMXO2-4000 |  | | LCMXO2-7000 |  |
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