Breakthrough Performance at the Lowest Cost
Xilinx has once again set the standard for high-performance FPGAs. The Virtex™-4 family of platform FPGAs provides the most advanced logic, highest performance, highest density, and greatest memory capacity. With 200,000 logic cells, 500 MHz performance, and unrivaled system features, the Virtex-4 devices deliver twice the density, twice the performance, and half the power consumption of any other FPGA family.

Multiple Platforms-Freedom to Choose
The Virtex-4 family offers three platforms with a total of seventeen devices tailored to the requirements of different application domains. Our multiple platforms enable you to select the device that most cost-effectively implements your unique application; you pay only for the capabilities you need.

	High-performance logic
	•  Highest logic-to-feature ratio •  Highest I/O-to-feature ratio
	Ultra-high-performance signal processing
	•  Highest DSP-to-feature ratio •  Highest memory-to-feature ratio
	Embedded processing and high-speed serial connectivity
	•  Embedded IBM PowerPC™ processor and Ethernet MAC •  RocketIO™ multi-gigabit serial transceivers

Virtex-4 FPGAs achieve new levels of performance and value by combining the revolutionary ASMBL architecture with 90 nm process, copper metallization, and 300mm wafer technologies. Xilinx has proven (link to press release) these technologies in 90 nm devices shipping in high-volumes since March 2003.

The innovative ASMBL (Advanced Silicon Modular BLock) architecture enables Xilinx to assemble FPGA platforms with varying feature mixes suitable for different application domains.

Endless Possibilities-Design for Any Application
Virtex-4 FPGAs offer integrated system-level capabilities that shrink design cycles and reduce system cost. Use Virtex-4 FPGAs to replace ASICs and ASSPs in applications such as: networking, telecom, storage, servers, computing, wireless, broadcast, video, imaging, medical, industrial, and defense.

Solutions for Every System Design Challenge

• Connectivity
  • Implement single-ended and differential system interface standards with SelectIO™ technology and pre-verified IP
  • Simplify source-synchronous interfacing with ChipSync™ technology built into every I/O
  • Support the widest range of serial I/O standards with 24 full duplex RocketIO™ transceivers and pre-verified IP
  • Simplify board design with XCITE active I/O termination (series, parallel, differential) technology
• Embedded Processing
• Build area-efficient, high-performance embedded systems or complex control functions with hard and soft processor cores
• Design with embedded IBM PowerPC™ 405 processors
• Simplify hardware acceleration and co-processing with the new Auxiliary Processor Unit (APU) controller for the PowerPC processor
• Select from a variety of soft IP cores, including 32-bit MicroBlaze™ processor, 8-bit PicoBlaze™ controller, IBM CoreConnect busses, and peripherals developed by Xilinx and partners
• Ultra-High-Performance Digital Signal Processing (DSP)
  • Solve multi-channel and ultra-high-performance DSP challenges with the new XtremeDSP slice
  • Build real-time video, imaging, wireless, and encryption systems
  • Select from DSP building-block IP such as filters, transforms, codecs, and algorithms
  • Up to 512 XtremeDSP slices can be cascaded in a column with consuming additional logic resources

Unbeatable Performance

• 500 MHz System Clocking
• 1+ Gbps SelectIO parallel I/O
• 622 Mbps-10.3125 Gbps RocketIO transceivers
• 256 GMACS (18x18) Digital Signal Processing cicuitry
• 450 MHz, 680 DMIPS PowerPC processing-up to 1,360 DMIPS in a single device

Highest Integration

• 200,000 Logic Cells: implement large SoC designs
• Embedded Functionality: increase effective logic capacity and decrease device cost

Reduced Power Consumption

• Triple-oxide technology: achieve performance goals while reducing power consumption as much as 50%
• Hard IP Integration: implement key system functions with up to 80% lower power than equivalent functions constructed in logic cells

Built-in Functionality Simplifies System Design

• Xesium Clocking Technology offers an abundance of flexible, high-performance clocking resources and clock management features
• ChipSync technology provides dedicated high-precision circuits for simplified source-synchronous interfacing
• Block RAM includes built-in error checking and correction (ECC) and converts to FIFO without consuming logic cells
• Integrated Ethernet Media Access Controller (MAC) blocks enable inter/intra-system communication
• Fourth-generation design security protects your intellectual property

Maximum Productivity and Lowest System Cost
Virtex-4 FPGAs deliver the lowest system cost with breakthrough pricing and a development methodology that shrinks design and debug cycles

• Complete Design Tool Suite
  Speed design creation with twice the productivity of ASIC design flows. Slash debug cycle time with the advanced verification and real-time debug capabilities of ChipScope™ Pro tools.
• Over 200 Pre-verified IP Cores
  Design faster and reduce risk with the latest pre-verified, pre-optimized intellectual property cores
• Education and Customized Support
  A ccelerate product development with online resources, training courses, and premium support services. The Xilinx Productivity Advantage (XPA) offers bundled packages of software, education, support services, and IP cores.
• Expert Design Services
  A ugment your development team with our worldwide network of Xilinx Design Service (XDS) and partner system design experts.

Virtex-4 EasyPath™
The lowest system cost just got lower with the industry's easiest, risk-free path for FPGA volume production!

• Cost reduction option available for 15 Virtex-4 family members
• Only one-to-one match from FPGA to high volume cost reduction
• Lower than Structured ASIC prices
  • Industry’s lowest NRE in 90nm technology: $75,000 vs. $225,000+ for competition
  • 30 – 80% unit cost reduction over FPGAs
  • Lowest total cost solution – NRE, Unit Prices, Tools, IP, Time to market, Risk-free
• Unmatched FPGA-like flexibility compared to ASICs
  • Make in-system ECO-like changes at LUT or I/O Level
  • Implement two design versions per Virtex-4 EasyPath device
• Conversion-free methodology compared to ASICs
  • Identical functionality and timing from prototypes to production
  • Fastest times to production – 8 weeks